The invention has applications, in particular, in the automobile field. It can be implemented, for example, in an electronic circuit incorporating a switching structure such as a transistor H-bridge.
In the automobile industry, such integrated circuits are used for controlling the direction and/or the intensity of the electrical current in inductive loads such as for example electric motors.
These motors may be used in electronic control systems for an actuator. This could for example be a device for controlling a throttle valve (or ETC device, for “Electronic Throttle Control”), or the exhaust gas recirculation valve (or EGR device), or any other valve used in the engine or other control. More generally, it could be any other equipment actuated by electric motor, such as an electric window, for example.
The power supply for such inductive loads generally uses a switching structure such as a switching H-bridge. An H-bridge comprises four power switches, namely two “high” switches on the side of a positive power supply, for example a battery producing a positive power supply voltage, and two “low” switches on the side of a negative power supply or ground. Each switch generally comprises a MOS (Metal Oxide Semiconductor) power transistor.
A sequence of analog control signals for the four transistors is produced based on a setpoint control signal. The setpoint signal and the analog control signals are in general pulse-width modulated signals, or PWM signals. Their duty cycle allows the quantity of current injected into the inductive load to be controlled and hence, on average, the intensity of the current in this load.
One example of a functional breakdown of an electronic control system according to a layered architecture is illustrated in FIG. 2. A layer 21, hierarchically the highest, named “application” layer, allows a set of parameters to be chosen (initialization). The setpoint signal is generated within a layer 22 referred to as “control” layer of the system, coming above a layer 23, or “command” layer, itself above a layer 24, or “hardware” layer, composed of the electronic elements of the H-bridge. With regard to the hardware and/or software implementation, the “command” layer 23 and “hardware” layer 24 can be formed within the same integrated circuit. The “application” layer 21 and “control” layer 22 can be implemented in the microprocessor of a automobile's computer.
One given strategy causes the control of the H-bridge in certain given configurations, at the frequency of the setpoint signal. Other configurations are on the contrary prohibited, such as for example a configuration where a high switch and a low switch are closed together creating a short-circuit between the battery and ground.
Short-circuits may occur within the cabling between the outputs of the H-bridge, or between each of the outputs and ground, or between each of the outputs and the positive voltage of the battery. The H-bridge protects itself by disconnecting itself from the power in a case of short-circuit, and thus avoids its own destruction.
The existence of a potential short-circuit can be verified by a measurement of the current flowing through the power transistors. This measurement must be carried out during one period of the control signals, inside of a time window entirely included within a fraction of said period of the control signals where the latter do not change electrical state, which clearly depends on the duty cycle. If the current measured during this reference time window exceeds a given threshold, called short-circuit current, an anomaly is declared in the “command” layer 23 of the system.
However, in the “control” layer 22, the general strategy is to filter rare fault occurrences, which occurrences would not in any case be confirmed during diagnostic testing in a repair shop. In order to overcome the problem of a detection that is too sensitive, a confirmation mechanism can be implemented over several successive verifications. This mechanism may be based on an anomaly counter respectively associated with each of the anomalies being considered. This anomaly counter may for example be kept updated in the “application” layer 21 of the system, depending on information relating to the presence or to the absence of the anomaly which is fed back from the “hardware” layer 24, via the “control” layer 22 and “command” layer 23, when each of the verifications is carried out. Thus, the anomaly counter is incremented if a verification yields a positive result with respect to the presence of an anomaly, and can be decremented in the opposite case.
However, it may potentially happen that verifications do not enable the detection of an anomaly that is nevertheless actually present. Such situations comprise for example the following non-limiting cases:                impossibility of detection of a short-circuit in the configuration of the H-bridge at the time of the verification (for example if the short-circuit sought is in parallel with a switch which is in the closed state in said configuration);        insufficiency of the time available for the verification, with respect to the time needed to observe the abnormal rise in the current in the load allowing the detection of the short-circuit (in view of the frequency and the duty cycle of the setpoint signal, and/or owing potentially to the inductance of the short-circuit);        insufficiency of the short-circuit current (in view of the voltage of the battery, and/or owing potentially to the resistance of the short-circuit).        
It is for this reason that the confirmation mechanism may furthermore generate validity information associated with the information on the absence of an anomaly, in order to discriminate a situation of real absence of an anomaly from a situation of non-detection of the anomaly having nevertheless an uncertainty with regard to the existence or the absence of this anomaly. Indeed, the fact that an anomaly was not able to be detected during a given verification does not necessarily indicate the absence of said anomaly.
Thus, when an information relating to the absence of an anomaly is fed back to the “control” layer 22, the anomaly counter is only decremented if, in addition, a validity bit is set. If the validity bit is not set, the counter is left in its current state (neither incremented, nor decremented).
The anomaly detection devices which operate according to the principle hereinabove are relatively slow as regards the validity bit. Indeed, the current anomaly detection devices carry out the current measurement inside of a time window with a fixed duration. In the absence of a short-circuit, this duration can be in the range between 30 and 55 μs. If a short-circuit is detected, the validity bit is set upon detection, which is very probably made in a time well below 30 μs. Given that the period during which the H-bridge remains in a given configuration depends on the duty cycle, and in view of the range of duty cycle to be covered (ideally from 10% to 90% of the period of the setpoint signal, and generally as a minimum from 20% to 80% of this range), it turns out that the use of an anomaly bit in the known devices is not satisfactory, in this example, for frequencies higher than 3.6 kHz. Beyond such a frequency, the detection of anomalies is not optimal, because the system is frequently in one of the above-mentioned cases, so much so that many consecutive verifications give rise to a situation of uncertainty resulting in the impossibility of taking into account the validity bit.
Under these conditions, the use of the validity bit for the management of the anomaly counter, as presented hereinabove, in fact degrades the performance of the anomaly detection. It is for this reason that, currently, the systems that have to operate at a frequency higher than around 3.6 kHz do not use the validity bit. Consequently, all the situations of uncertainty with regard to the existence or the absence of an anomaly are handled by the upfeed of the information relating to the non-detection of anomalies, without any other possible discrimination. This type of detection is likely to generate delays in the response provided to the “application” level 21 in the case of the presence of a real anomaly. In certain cases, the known devices do not allow the detection of the presence of an anomaly.